1. Field of the Invention
The invention relates in general to a voltage supply control apparatus. More particularly, the invention relates to a voltage supply control apparatus that provides a control of the magnitude of the supplied voltage while a low voltage operation device is or is not operated.
2. Description of the Related Art
To apply 3V to a device, to reduce the voltage Vcc to a required voltage, the dual gate oxide process is often employed, since the peripheral pad and I/O interface can be formed using the design of a 3V thick gate with a 3 micron standard. For other circuits, including the core cell and peripheral circuit, more advanced techniques, such as 0.18/0.15/0.13 micron, are used to obtain a voltage drop for Vcc. The die size can also be reduced to effectively decrease the total amount of die for each wafer, and thus, to cut cost and to strengthen compatibility in the market.
FIG. 1 shows a conventional voltage supply controller. A transistor 10 comprising a gate is coupled to the voltage Vcc as a voltage drop. By adjusting the threshold voltage of this device (that is, transistor 10), or connecting several devices (such as transistors 10, 12), the voltage to connect to the voltage receiving terminal of the device 14 is determined.
The above transistors 10, 12 can be other types of transistors, for example, a combination with a high threshold voltage Vtnh, a normal threshold voltage Vtn and a low threshold voltage Vtn1. Actually, as shown in the I-V characteristic curve of a transistor in FIG. 2, when the current I of the low voltage operation device is small (that is, in standby mode), the voltage VCCI at the voltage source receiving terminal of the low voltage operation device is higher. When the current I is large (that is, in the operation mode), the voltage VCCI at the voltage source receiving terminal of the low voltage operation device is lower.
The I-V characteristic curve is opposite to certain requirements. For ultra low voltage source devices, in standby mode, the voltage VCCI at the voltage source receiving terminal of a low voltage operation device 14 is higher, and so the internal standby current Isb of the low voltage operation device 14 is too large. For example, for a typical 4M SRAM, the standby current Isb has to be smaller than 10 mA to ensure a standby status. In contrast, in normal operation mode, the voltage VCCI at the voltage source receiving terminal of the low voltage operation device 14 is low, resulting in the internal operation current Icc of the low voltage operation device 14 to be ranged within tens of mA. This causes the problems of slow address access time (TAA) and small Vcc.
The invention provides a voltage supply controller to control the voltage VCCI of the voltage source receiving terminal of a low voltage operation device to be lower in a standby mode and higher in an operation mode. The above problems of having an exceedingly large standby current Isb, a slow address access time and a small VCC can thus be resolved.
The voltage supply controller provided by the invention is suitable for use in a low operation voltage device, which comprises a voltage source receiving terminal. While operating the low voltage operation device, an operation enable signal is output.
The voltage supply controller comprises a high threshold voltage transistor and a low threshold voltage transistor. The high threshold voltage transistor comprises a gate and a first source/drain region coupled to a high voltage and a second source/drain region coupled to the voltage source receiving terminal. The low threshold voltage transistor comprises a first source/drain region coupled to the high voltage, a gate to receive the operation enable signal, and a second source/drain region coupled to the voltage source receiving terminal.
When the low voltage device is not operated (that is, in standby mode), the low threshold voltage transistor is cut off. The voltage drop of the high voltage received by the voltage source receiving terminal is controlled by the high threshold voltage transistor. Therefore, the received voltage can be maintained at a lower state. In contrast, when the low voltage operation device is operated, the operation enable signal conducts the low threshold voltage transistor to control the voltage drop of the received high voltage.
The above high and low threshold voltage transistors include dual gate oxide transistors. The supplied high voltage is ranged between 3V to 5V. The threshold voltage of the high threshold voltage transistor is set at about 1 .2V, and the threshold of the low threshold voltage transistor is set at about 0.6V.
The invention further provides another kind of voltage supply controller suitably used for a low voltage operation device with a voltage source receiving terminal. When the low voltage operation device is operated, an operation enable signal is output.
The voltage supply controller comprises a high threshold voltage transistor, a low threshold voltage transistor and at least a voltage drop transistor. The high threshold voltage transistor comprises a gate and a first source/drain region coupled to a high voltage. The low threshold voltage transistor comprises a first source/drain region coupled to the high voltage, and a gate to receive the operation enable signal. The voltage drop transistor comprises a first control terminal coupled to second source/drain regions of the low and high threshold voltage transistors, and a second control terminal coupled to the voltage source receiving terminal to provide a voltage drop function.
When the low voltage device is not operated (that is, in standby mode), the low threshold voltage transistor is cut off. The voltage drop of the high voltage received by the voltage source receiving terminal is controlled by the high threshold voltage transistor and the voltage drop transistor. Therefore, the voltage can be maintained at a lower state. In contrast, when the low voltage operation device is operated, the operation enable signal conducts the low threshold voltage transistor. Together with the voltage drop transistor, the voltage drop of the received high voltage is controlled.
One voltage drop transistor can be used, and the gate control terminal thereof is coupled to the first control terminal. The high threshold voltage transistor, the low threshold voltage transistor and the voltage drop transistor comprise dual gate oxide transistors. The high voltage is ranged from about 3V to about 5V.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.